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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-22 23:29:25 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-22 23:29:25 +0000 |
| commit | 7bc47020f68e6222a73f79bf295c4d64bb4d6c1b (patch) | |
| tree | 7c88e571b76865c318061dce6b4ae2fa095b25e2 /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | 13d01086663b261c1236e96057dbb60714657e48 (diff) | |
oops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20278 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 2dd354102d..426c406366 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -760,7 +760,7 @@ unsigned ISel::SelectExpr(SDOperand N) { // Put a pointer to the space into the result register, by copying the stack // pointer. - BuildMI(BB, Alpha::BIS, 1, Result).addReg(Alpha::R30).addReg(Alpha::R30); + BuildMI(BB, Alpha::BIS, 2, Result).addReg(Alpha::R30).addReg(Alpha::R30); return Result; case ISD::ConstantPool: |