diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-14 05:41:43 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-14 05:41:43 +0000 |
| commit | 572af908e45fcc9bc63d133ad79d6ec717332708 (patch) | |
| tree | 5c015ed25840d9ee78d14484ec354c082d942981 /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | d2beaa63b3515082b73ebb285938f2f8d335eb7c (diff) | |
fix setcc on floats, fixes singlesource:pi, perhaps others
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20172 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 30386d8bd8..9b0b2ccbbe 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -63,6 +63,8 @@ namespace { setOperationAction(ISD::MEMSET , MVT::Other, Expand); setOperationAction(ISD::MEMCPY , MVT::Other, Expand); + setOperationAction(ISD::SETCC , MVT::f32, Promote); + computeRegisterProperties(); addLegalFPImmediate(+0.0); //F31 @@ -1109,15 +1111,17 @@ unsigned ISel::SelectExpr(SDOperand N) { //Can only compare doubles, and dag won't promote for me if (SetCC->getOperand(0).getValueType() == MVT::f32) { + std::cerr << "Setcc On float?\n"; Tmp3 = MakeReg(MVT::f64); BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp1); Tmp1 = Tmp3; } if (SetCC->getOperand(1).getValueType() == MVT::f32) { + std::cerr << "Setcc On float?\n"; Tmp3 = MakeReg(MVT::f64); BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp2); - Tmp1 = Tmp2; + Tmp2 = Tmp3; } if (rev) std::swap(Tmp1, Tmp2); |