diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-27 15:36:48 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-27 15:36:48 +0000 |
| commit | 3b91807da740b76f05024c64d98f0f1a3c0bd0e7 (patch) | |
| tree | 52c59dbcef5ac6f70179c6faee5e57a83905d6fc /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | 07a9144efea7e870c53552d73dc078de8a3d0731 (diff) | |
who said we had to use the return address in the return address register. Might save a move in many cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22293 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index e2610c4406..9c9b3d6db0 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -179,6 +179,10 @@ namespace { { BuildMI(BB, Alpha::BIS, 2, Alpha::R26).addReg(RA).addReg(RA); } + unsigned getRA() + { + return RA; + } }; } @@ -2310,8 +2314,7 @@ void AlphaISel::Select(SDOperand N) { Select(N.getOperand(0)); break; } - AlphaLowering.restoreRA(BB); - BuildMI(BB, Alpha::RET, 1, Alpha::R31).addReg(Alpha::R26); // Just emit a 'ret' instruction + BuildMI(BB, Alpha::RET, 1, Alpha::R31).addReg(AlphaLowering.getRA()); // Just emit a 'ret' instruction return; case ISD::TRUNCSTORE: |
