diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-12 21:11:17 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-12 21:11:17 +0000 |
| commit | 093f32785bc2d5707afdf5a268b650b18672e08e (patch) | |
| tree | 68638235aa236c1fb7352a08d5a6ca2010ceaee8 /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | 9b1e659cd64c8e4239bf15f5be10e82244ca9028 (diff) | |
try to do better match for i32 adds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20143 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 49e9b54e3d..30386d8bd8 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -920,13 +920,34 @@ unsigned ISel::SelectExpr(SDOperand N) { cast<ConstantSDNode>(N.getOperand(0).getOperand(1))->getValue() <= 255) { //Normal imm add/sub Opc = isAdd ? Alpha::ADDLi : (isMul ? Alpha::MULLi : Alpha::SUBLi); - Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); + //if the value was really originally a i32, skip the up conversion + if (N.getOperand(0).getOperand(0).getOpcode() == ISD::SIGN_EXTEND_INREG && + dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(0).Val) + ->getExtraValueType() == MVT::i32) + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0)); + else + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); Tmp2 = cast<ConstantSDNode>(N.getOperand(0).getOperand(1))->getValue(); BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addImm(Tmp2); } else { //Normal add/sub Opc = isAdd ? Alpha::ADDL : (isMul ? Alpha::MULLi : Alpha::SUBL); + //if the value was really originally a i32, skip the up conversion + if (N.getOperand(0).getOperand(0).getOpcode() == ISD::SIGN_EXTEND_INREG && + dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(0).Val) + ->getExtraValueType() == MVT::i32) + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0)); + else + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); + //if the value was really originally a i32, skip the up conversion + if (N.getOperand(0).getOperand(1).getOpcode() == ISD::SIGN_EXTEND_INREG && + dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(1).Val) + ->getExtraValueType() == MVT::i32) + Tmp2 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(0)); + else + Tmp2 = SelectExpr(N.getOperand(0).getOperand(1)); + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); Tmp2 = SelectExpr(N.getOperand(0).getOperand(1)); BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2); |