add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25011 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 3 insertions, 3 deletions

diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 59b9199b92..29627c518d 100644
--- a/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -136,9 +136,9 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
   case MachineOperand::MO_GlobalAddress:
     //Abuse PCrel to specify pcrel calls
     //calls are the only thing that use this flag
-    if (MO.isPCRelative())
-      O << PrivateGlobalPrefix << Mang->getValueName(MO.getGlobal()) << "..ng";
-    else
+//     if (MO.isPCRelative())
+//       O << PrivateGlobalPrefix << Mang->getValueName(MO.getGlobal()) << "..ng";
+//     else
       O << Mang->getValueName(MO.getGlobal());
     return;