diff options
| author | Chris Lattner <sabre@nondot.org> | 2006-05-04 18:05:43 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-05-04 18:05:43 +0000 |
| commit | 2d90ac7ca6117d3b160dde8a4f322c1079a6ffce (patch) | |
| tree | 2100b8964e5214d3119d5e8a7c0f5bd1682f1fc3 /lib/Target/Alpha/AlphaAsmPrinter.cpp | |
| parent | 68ab4c6367f34e6320c5f0ce22b85f800bdcfd81 (diff) | |
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaAsmPrinter.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaAsmPrinter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp index e51b78457b..59a8505376 100644 --- a/lib/Target/Alpha/AlphaAsmPrinter.cpp +++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp @@ -77,7 +77,7 @@ FunctionPass *llvm::createAlphaCodePrinterPass (std::ostream &o, void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum) { const MachineOperand &MO = MI->getOperand(opNum); - if (MO.getType() == MachineOperand::MO_VirtualRegister) { + if (MO.getType() == MachineOperand::MO_Register) { assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??"); O << TM.getRegisterInfo()->get(MO.getReg()).Name; } else if (MO.isImmediate()) { @@ -93,7 +93,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) { int new_symbol; switch (MO.getType()) { - case MachineOperand::MO_VirtualRegister: + case MachineOperand::MO_Register: O << RI.get(MO.getReg()).Name; return; |