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| author | Richard Barton <richard.barton@arm.com> | 2012-07-09 16:14:28 +0000 |
|---|---|---|
| committer | Richard Barton <richard.barton@arm.com> | 2012-07-09 16:14:28 +0000 |
| commit | c985e6ece66cf2046f0113da9eb2dec331a6b09f (patch) | |
| tree | bebd596719b80b093f7cbb61fbd8bab05aa28a39 /lib/Target/ARM | |
| parent | 2b6652fb10d7005e41010b0e0800afe16ae18a34 (diff) | |
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159936 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 769e3aaed4..b084265e5a 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -7294,7 +7294,7 @@ processInstruction(MCInst &Inst, case ARM::t2RORrr: case ARM::t2BICrr: { - // Assemblers should use the narrow encodings of these instructions when permissable. + // Assemblers should use the narrow encodings of these instructions when permissible. if ((isARMLowRegister(Inst.getOperand(1).getReg()) && isARMLowRegister(Inst.getOperand(2).getReg())) && Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() && @@ -7330,7 +7330,7 @@ processInstruction(MCInst &Inst, case ARM::t2ADCrr: case ARM::t2ORRrr: { - // Assemblers should use the narrow encodings of these instructions when permissable. + // Assemblers should use the narrow encodings of these instructions when permissible. // These instructions are special in that they are commutable, so shorter encodings // are available more often. if ((isARMLowRegister(Inst.getOperand(1).getReg()) && |