diff options
| author | Jim Grosbach <grosbach@apple.com> | 2011-06-30 02:22:49 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-06-30 02:22:49 +0000 |
| commit | 41ca4b7b62fc40b3207eff0526171653605efa19 (patch) | |
| tree | f87d585a2481b4a2f9ce7ba0791509ae9a8cd3e9 /lib/Target/ARM/Thumb2SizeReduction.cpp | |
| parent | 4cc446bc400b2ff58af81c91f5e145b81d6beb26 (diff) | |
Size reducing SP adjusting t2ADDri needs to check predication.
tADDrSPi is not predicable, so we can't size-reduce a t2ADDri to it if the
predicate is anything other than "always."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134130 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb2SizeReduction.cpp')
| -rw-r--r-- | lib/Target/ARM/Thumb2SizeReduction.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/ARM/Thumb2SizeReduction.cpp b/lib/Target/ARM/Thumb2SizeReduction.cpp index 65846b2422..cb44f8e71c 100644 --- a/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -491,11 +491,14 @@ Thumb2SizeReduce::ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI, // Try to reduce to tADDrSPi. unsigned Imm = MI->getOperand(2).getImm(); // The immediate must be in range, the destination register must be a low - // reg, and the condition flags must not be being set. + // reg, the predicate must be "always" and the condition flags must not + // be being set. if (Imm & 3 || Imm > 1024) return false; if (!isARMLowRegister(MI->getOperand(0).getReg())) return false; + if (MI->getOperand(3).getImm() != ARMCC::AL) + return false; const MCInstrDesc &MCID = MI->getDesc(); if (MCID.hasOptionalDef() && MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR) |