diff options
| author | Owen Anderson <resistor@mac.com> | 2011-10-13 17:58:39 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-10-13 17:58:39 +0000 |
| commit | c18e940c5a1c050701594ee2b356cd40249505a3 (patch) | |
| tree | 3e98fb683912f971725f6a84326a261ef2f05805 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 753e02ad5d7042bc6bf175c676327ae9486a8341 (diff) | |
SETEND is not allowed in an IT block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141874 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index d33cb94916..702a794fad 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -598,6 +598,7 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const { case ARM::t2CPS2p: case ARM::t2CPS1p: case ARM::tMOVSr: + case ARM::tSETEND: // Some instructions (mostly conditional branches) are not // allowed in IT blocks. if (!ITBlock.empty()) |