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authorOwen Anderson <resistor@mac.com>2011-08-22 23:44:04 +0000
committerOwen Anderson <resistor@mac.com>2011-08-22 23:44:04 +0000
commit8e1e60b5f8fd9c6233bdb8814ee40887555a0594 (patch)
tree9704eb2a12fb04927d573fe2ee4dfa0e785557c5 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parent6667e5429608b5a0d55850b980ae433deda0e5f2 (diff)
Reject invalid imod values in t2CPS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138306 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index db35c1891c..cc2a583ab8 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -179,7 +179,8 @@ static DecodeStatus DecodeVMOVSRR(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
-
+static DecodeStatus DecodeCPSIMod(llvm::MCInst &Inst, unsigned Insn,
+ uint64_t Address, const void *Decoder);
static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
uint64_t Address, const void *Decoder);
@@ -3240,3 +3241,11 @@ static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
return S;
}
+
+static DecodeStatus DecodeCPSIMod(llvm::MCInst &Inst, unsigned Val,
+ uint64_t Address, const void *Decoder) {
+ if (Val == 0x1) return Fail;
+ Inst.addOperand(MCOperand::CreateImm(Val));
+ return Success;
+}
+