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| author | Owen Anderson <resistor@mac.com> | 2011-08-12 20:02:50 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-12 20:02:50 +0000 |
| commit | 79628e92e1f903d50340d4cd3d1ea8c5fff63a87 (patch) | |
| tree | 65268e66fbc19c9564ae383b5e53b3074d20389d /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | c513309224611d662a8de51f81216164f5954a30 (diff) | |
Fix decoding of ARM-mode STRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137499 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 7de0c236ac..b3db84947d 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1090,6 +1090,9 @@ static bool DecodeAddrMode3Instruction(llvm::MCInst &Inst, unsigned Insn, case ARM::STRD: case ARM::STRD_PRE: case ARM::STRD_POST: + case ARM::STRH: + case ARM::STRH_PRE: + case ARM::STRH_POST: if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false; break; |