diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-09 23:05:39 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-09 23:05:39 +0000 |
| commit | 35008c2f8dcfe55960fe4efea3a26e526d437ad6 (patch) | |
| tree | 0ea56653b70c88448970ccfe1e7248d7282e9df9 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 438f68df353eb501be018111c28a6e112bd8a01d (diff) | |
Tighten operand checking on CPS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137172 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index d7b88560d7..a3fa138ba6 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -83,6 +83,8 @@ static bool DecodeMemMultipleWritebackInstruction(llvm::MCInst & Inst, const void *Decoder); static bool DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); +static bool DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn, + uint64_t Address, const void *Decoder); static bool DecodeAddrModeImm12Operand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); static bool DecodeAddrMode5Operand(llvm::MCInst &Inst, unsigned Val, @@ -1139,6 +1141,9 @@ static bool DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn, unsigned iflags = fieldFromInstruction32(Insn, 6, 3); unsigned mode = fieldFromInstruction32(Insn, 0, 5); + // imod == '01' --> UNPREDICTABLE + if (imod == 1) return false; + if (M && mode && imod && iflags) { Inst.setOpcode(ARM::CPS3p); Inst.addOperand(MCOperand::CreateImm(imod)); |