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| author | Owen Anderson <resistor@mac.com> | 2011-08-11 22:05:38 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-11 22:05:38 +0000 |
| commit | 1fb6673bc2f0a404f4f914bf381c627402ac7c6b (patch) | |
| tree | ec8ab5497018f89ccc155e5ec79c9593c5eb7923 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | dd32ba337aab88c215108ca8bf4a0267fce1e773 (diff) | |
Add missing predicate operand on SMLA and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137368 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index e4d7393beb..b5adc4977e 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1260,6 +1260,8 @@ static bool DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn, !DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder)) return false; + if (!DecodePredicateOperand(Inst, pred, Address, Decoder)) return false; + return true; } |