diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-18 22:15:25 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-18 22:15:25 +0000 |
| commit | 1dd56f05e1bc3e7f66f2b0de4b5ea3692136a77f (patch) | |
| tree | e2f64c15f0fd2b8ddc4650aa31895855d6bf0a72 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 14090bf2636edf5e46a2c12a312b1889f5335d7d (diff) | |
Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137997 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index f4c57fca9b..c5464ceb36 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1340,9 +1340,12 @@ static DecodeStatus DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn, Inst.setOpcode(ARM::CPS1p); Inst.addOperand(MCOperand::CreateImm(mode)); if (iflags) CHECK(S, Unpredictable); - } else + } else { // imod == '00' && M == '0' --> UNPREDICTABLE + Inst.setOpcode(ARM::CPS1p); + Inst.addOperand(MCOperand::CreateImm(mode)); CHECK(S, Unpredictable); + } return S; } |