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| author | Jim Grosbach <grosbach@apple.com> | 2011-08-11 20:04:56 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-11 20:04:56 +0000 |
| commit | 10348e70d567fb61f6c762d99e91e215c720ebd1 (patch) | |
| tree | c79e40fafa2d2964c762f72a2a82b4b10edb4ce1 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 961afdf1b641cfa9ed66a6705046393e1dea8847 (diff) | |
ARM STRBT assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 85e48c7165..d5994220a0 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -939,8 +939,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn, case ARM::STR_POST_REG: case ARM::STRTr: case ARM::STRTi: - case ARM::STRBTr: - case ARM::STRBTi: + case ARM::STRBT_POST_REG: + case ARM::STRBT_POST_IMM: if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false; break; default: |