diff options
| author | Owen Anderson <resistor@mac.com> | 2011-09-26 21:06:22 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-09-26 21:06:22 +0000 |
| commit | 0afa0094afdfe589f407feb76948f273b414b278 (patch) | |
| tree | dcc693d8abcbd0897ad5600232a3ced34d1ee48e /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | ad2d46d0a5a3e8593a2754b618acd6e9cfe39453 (diff) | |
ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index a775cf61b5..c8d1321351 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -307,6 +307,9 @@ static DecodeStatus DecodeT2Adr(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2LdStPre(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeT2ShifterImmOperand(llvm::MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); + #include "ARMGenDisassemblerTables.inc" @@ -3876,3 +3879,14 @@ static DecodeStatus DecodeT2Adr(llvm::MCInst &Inst, uint32_t Insn, return MCDisassembler::Success; } +static DecodeStatus DecodeT2ShifterImmOperand(llvm::MCInst &Inst, uint32_t Val, + uint64_t Address, + const void *Decoder) { + DecodeStatus S = MCDisassembler::Success; + + // Shift of "asr #32" is not allowed in Thumb2 mode. + if (Val == 0x20) S = MCDisassembler::SoftFail; + Inst.addOperand(MCOperand::CreateImm(Val)); + return S; +} + |