diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-11 19:00:18 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-11 19:00:18 +0000 |
| commit | 71156a6e00d3dc4c531a421a76b3b6ee0ae7d0ab (patch) | |
| tree | c12490332566015165297a4d31c70ab74df75652 /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 59353b436af38fb6e620b5360251bc733e4ad167 (diff) | |
Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 8a85cfade1..85e48c7165 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -978,6 +978,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn, else if (!P && writeback) idx_mode = ARMII::IndexModePost; + if (writeback && (Rn == 15 || Rn == Rt)) return false; // UNPREDICTABLE + if (reg) { if (!DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)) return false; ARM_AM::ShiftOpc Opc = ARM_AM::lsl; |