diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2007-02-28 23:12:34 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-02-28 23:12:34 +0000 |
| commit | ad78ef215485389bb5c5698fa6f1ac670f0076d8 (patch) | |
| tree | 7a973ee914f19d3620c116572f93c5d6a43d78a5 /lib/Target/ARM/ARMRegisterInfo.cpp | |
| parent | c6aedf70b3a7d0478b8882bf79b985a48d78d37e (diff) | |
Doh. ARM::PC is obvious a reserved register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 2c53bfd693..3dac8b030b 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -315,6 +315,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const { BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(ARM::SP); + Reserved.set(ARM::PC); if (STI.isTargetDarwin() || hasFP(MF)) Reserved.set(FramePtr); // Some targets reserve R9. |