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author | Evan Cheng <evan.cheng@apple.com> | 2009-11-14 01:50:00 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-11-14 01:50:00 +0000 |
commit | 0cd22dd7383111192571884eb941ac2ccb668025 (patch) | |
tree | a06b650eb18e721c0fe20c6012b572b310a67bf4 /lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
parent | 3b6ced15108909de2fab0766fc693fe66c48ab68 (diff) |
When expanding t2STRDi8 r, r to two stores, add kill markers correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
-rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 873a8d3cfe..304d0ef662 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -866,6 +866,13 @@ bool ARMLoadStoreOpt::FixInvalidRegPairOp(MachineBasicBlock &MBB, BaseReg, BaseKill, BaseUndef, OffReg, OffKill, OffUndef, Pred, PredReg, TII, isT2); } else { + if (OddReg == EvenReg && EvenDeadKill) { + // If the two source operands are the same, the kill marker is probably + // on the first one. e.g. + // t2STRDi8 %R5<kill>, %R5, %R9<kill>, 0, 14, %reg0 + EvenDeadKill = false; + OddDeadKill = true; + } InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc, EvenReg, EvenDeadKill, EvenUndef, BaseReg, false, BaseUndef, OffReg, false, OffUndef, |