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authorAnton Korobeynikov <asl@math.spbu.ru>2009-11-02 00:12:06 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-11-02 00:12:06 +0000
commit2ae0eec1c03fa005136b8724faab38048878f253 (patch)
tree170f21be74360350840ff62b17b1692dfef8ebdb /lib/Target/ARM/ARMISelLowering.cpp
parent3a639a07ea14f2e404fb1d3a14005ff468543911 (diff)
Handle splats of undefs properly. This includes the testcase for PR5364 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 88649ab2be..41a597a00f 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -2735,6 +2735,9 @@ static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
if (ShuffleVectorSDNode::isSplatMask(&ShuffleMask[0], VT)) {
int Lane = SVN->getSplatIndex();
+ // If this is undef splat, generate it via "just" vdup, if possible.
+ if (Lane == -1) Lane = 0;
+
if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) {
return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));
}