diff options
author | Eric Christopher <echristo@apple.com> | 2010-10-02 00:32:44 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-10-02 00:32:44 +0000 |
commit | 890dbbec5773fb4d3823e3102d403d79900b08bc (patch) | |
tree | 4356c774461c79c8177bf030d55788ea3ea3f2a0 /lib/Target/ARM/ARMFastISel.cpp | |
parent | 8c9aa922a94bd788ea061be7555fb5b1db3a5312 (diff) |
Start on lowering global addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115390 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 45 |
1 files changed, 43 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 3a716d321c..5134d460b7 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -449,8 +449,49 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) { } unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, EVT VT) { - // Disable currently... - return 0; + // For now 32-bit only. + if (VT.getSimpleVT().SimpleTy != MVT::i32) return 0; + + Reloc::Model RelocM = TM.getRelocationModel(); + + // TODO: No external globals for now. + if (Subtarget->GVIsIndirectSymbol(GV, RelocM)) return 0; + + // TODO: Need more magic for ARM PIC. + if (!isThumb && (RelocM == Reloc::PIC_)) return 0; + + // MachineConstantPool wants an explicit alignment. + unsigned Align = TD.getPrefTypeAlignment(GV->getType()); + if (Align == 0) { + // TODO: Figure out if this is correct. + Align = TD.getTypeAllocSize(GV->getType()); + } + + // Grab index. + unsigned PCAdj = (RelocM != Reloc::PIC_) ? 0 : (Subtarget->isThumb() ? 4 : 8); + unsigned Id = AFI->createConstPoolEntryUId(); + ARMConstantPoolValue *CPV = new ARMConstantPoolValue(GV, Id, + ARMCP::CPValue, PCAdj); + unsigned Idx = MCP.getConstantPoolIndex(CPV, Align); + + // Load value. + MachineInstrBuilder MIB; + unsigned DestReg = createResultReg(TLI.getRegClassFor(VT)); + if (isThumb) { + unsigned Opc = (RelocM != Reloc::PIC_) ? ARM::t2LDRpci : ARM::t2LDRpci_pic; + MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), DestReg) + .addConstantPoolIndex(Idx); + if (RelocM == Reloc::PIC_) + MIB.addImm(Id); + } else { + // The extra reg and immediate are for addrmode2. + MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(ARM::LDRcp), + DestReg) + .addConstantPoolIndex(Idx) + .addReg(0).addImm(0); + } + AddOptionalDefs(MIB); + return DestReg; } unsigned ARMFastISel::TargetMaterializeConstant(const Constant *C) { |