diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2009-09-28 09:14:39 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-09-28 09:14:39 +0000 |
| commit | 5adb66a646e2ec32265263739f5b01c3f50c176a (patch) | |
| tree | 38b5fb6a9d2665466cd3b88031122d9c95de6110 /lib/Target/ARM/ARMCodeEmitter.cpp | |
| parent | 705428ae4a7fa6d97a95f7811fa2e36630a43c9c (diff) | |
Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo
instruction. This makes it re-materializable.
Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 57f7d38ae0..5e0c11e5da 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -596,7 +596,8 @@ void Emitter<CodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) { unsigned Opcode = MI.getDesc().Opcode; switch (Opcode) { default: - llvm_unreachable("ARMCodeEmitter::emitPseudoInstruction");//FIXME: + llvm_unreachable("ARMCodeEmitter::emitPseudoInstruction"); + // FIXME: Add support for MOVimm32. case TargetInstrInfo::INLINEASM: { // We allow inline assembler nodes with empty bodies - they can // implicitly define registers, which is ok for JIT. |