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authorMark Seaborn <mseaborn@chromium.org>2012-11-08 07:18:03 -0800
committerMark Seaborn <mseaborn@chromium.org>2012-11-08 07:18:03 -0800
commitab80f55fb9bc042c115479c3b5debd86d3b72a6f (patch)
tree639d06f367080c0a049a12d292e04f78aff523ff /lib/Target/ARM/ARMBaseRegisterInfo.cpp
parent96b7ae0415ed0b161b66e57bb6092192ed330ec7 (diff)
Add @nacl.read.tp() intrinsic, a fast version of NaCl's tls_get() IRT interface
This is in preparation for adding an LLVM pass that will expand out TLS (thread_local) variable accesses into calls to nacl.read.tp. On ARM, there is already an arm.thread.pointer intrinsic. We reuse the code for that. On x86, we have to add an implementation. The added code is based on x86's LowerToTLSExecModel() for the %gs:0 case, and on NaCl-MIPS' LowerGlobalTLSAddress() for the __nacl_read_tp() case. (In contrast, X86NaClRewritePass.cpp inserts a __nacl_read_tp() call at the lower MI level; we don't use that approach here.) We convert LowerINTRINSIC_WO_CHAIN() into a method in order to access the Subtarget member. This is consistent with other x86 Lower methods and with the ARM version. BUG=https://code.google.com/p/nativeclient/issues/detail?id=2837 TEST="llvm-lit test/NaCl" Review URL: https://codereview.chromium.org/11383002
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