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| author | Bob Wilson <bob.wilson@apple.com> | 2010-06-15 05:51:27 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-06-15 05:51:27 +0000 |
| commit | 14f1d4e74bd52b044a2c2bb6dd8df20b0480e633 (patch) | |
| tree | 9292cca90990c55216ac2a026f4f0c2fd172ab6c /lib/Target/ARM/ARMBaseInstrInfo.cpp | |
| parent | 69ba5c6aa8d459a5d81e68ee3457deaa6a903e86 (diff) | |
VMOVQQ and VMOVQQQQ are pseudo instructions and not predicable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105990 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMBaseInstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 01095626a9..b89a8ad7a8 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -759,7 +759,10 @@ ARMBaseInstrInfo::copyRegToReg(MachineBasicBlock &MBB, else return false; - AddDefaultPred(BuildMI(MBB, I, DL, get(Opc), DestReg).addReg(SrcReg)); + MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc), DestReg); + MIB.addReg(SrcReg); + if (Opc != ARM::VMOVQQ && Opc != ARM::VMOVQQQQ) + AddDefaultPred(MIB); } return true; |