aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARM.h
diff options
context:
space:
mode:
authorBob Wilson <bob.wilson@apple.com>2009-09-28 14:30:20 +0000
committerBob Wilson <bob.wilson@apple.com>2009-09-28 14:30:20 +0000
commit522ce975327e1aeba8317b233cdb54366e2645b5 (patch)
tree858643786c87f2b6432334784f20184f2e04bdd8 /lib/Target/ARM/ARM.h
parent5adb66a646e2ec32265263739f5b01c3f50c176a (diff)
Pass the optimization level when constructing the ARM instruction selector.
Otherwise, it is always set to "default", which prevents debug info from even being generated during isel. Radar 7250345. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82988 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.h')
-rw-r--r--lib/Target/ARM/ARM.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARM.h b/lib/Target/ARM/ARM.h
index e95dfc02b6..487ce1dd43 100644
--- a/lib/Target/ARM/ARM.h
+++ b/lib/Target/ARM/ARM.h
@@ -92,7 +92,8 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
}
}
-FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM);
+FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
+ CodeGenOpt::Level OptLevel);
FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
MachineCodeEmitter &MCE);