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authorEvan Cheng <evan.cheng@apple.com>2007-09-26 06:25:56 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-09-26 06:25:56 +0000
commit9efce638d307b2c71bd7f0258d47501661434c27 (patch)
treeff8e23600c1a2e9ba48a6010a2ec8a84c84f785b /lib/CodeGen/VirtRegMap.cpp
parent61001b8bd47adcf413dbb5b2a8c95cf22ec4bf7a (diff)
Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--lib/CodeGen/VirtRegMap.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 8a1432ec89..c6ac4b208d 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -926,7 +926,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
MF.setPhysRegUsed(DesignatedReg);
ReusedOperands.markClobbered(DesignatedReg);
- MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
+ MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC, RC);
MachineInstr *CopyMI = prior(MII);
UpdateKills(*CopyMI, RegKills, KillOps);
@@ -1009,8 +1009,9 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
DOUT << "Promoted Load To Copy: " << MI;
if (DestReg != InReg) {
- MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
- MF.getSSARegMap()->getRegClass(VirtReg));
+ const TargetRegisterClass *RC =
+ MF.getSSARegMap()->getRegClass(VirtReg);
+ MRI->copyRegToReg(MBB, &MI, DestReg, InReg, RC, RC);
// Revisit the copy so we make sure to notice the effects of the
// operation on the destreg (either needing to RA it if it's
// virtual or needing to clobber any values if it's physical).