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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-07-09 18:27:43 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-07-09 18:27:43 +0000 |
| commit | e86b01c153ba52307ecb6e7513ec33f57caedfdd (patch) | |
| tree | ebe42983048a37e2d605773b27d53c84311874e3 /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | e05442d50806e2850eae1571958816028093df85 (diff) | |
Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
0 files changed, 0 insertions, 0 deletions