diff options
author | Dale Johannesen <dalej@apple.com> | 2008-09-24 01:07:17 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2008-09-24 01:07:17 +0000 |
commit | 86b49f8e2de796cb46c7c8b6a4c4900533fd53f4 (patch) | |
tree | d5f083d21eb91a360fb9abe380d16fbd60d1689e /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
parent | e3d76d37e972d6f7b1335a3944ce31ae8f4cd3c9 (diff) |
Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 05e0505f0b..bdc37b16b6 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1206,14 +1206,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { DOUT << " and "; DstInt.print(DOUT, tri_); DOUT << ": "; - // If one interval is earlyclobber and the other is overlaps-earlyclobber, - // we cannot coalesce them. - if ((SrcInt.isEarlyClobber && DstInt.overlapsEarlyClobber) || - (DstInt.isEarlyClobber && SrcInt.overlapsEarlyClobber)) { - DOUT << "\t\tCannot join due to earlyclobber."; - return false; - } - // Check if it is necessary to propagate "isDead" property. if (!isExtSubReg && !isInsSubReg) { MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg, false); @@ -1374,10 +1366,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (TargetRegisterInfo::isVirtualRegister(DstReg)) RemoveUnnecessaryKills(DstReg, *ResDstInt); - // Merge the earlyclobber bits. - ResDstInt->isEarlyClobber |= ResSrcInt->isEarlyClobber; - ResDstInt->overlapsEarlyClobber |= ResSrcInt->overlapsEarlyClobber; - if (isInsSubReg) // Avoid: // r1024 = op |