diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-08 16:40:15 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-08 16:40:15 +0000 |
| commit | 5c00e077952d14899c3fc26709c7b2dfd36d0209 (patch) | |
| tree | 0cca1a2e6c2f57b5e7a8ba5ef597f32914630420 /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 2dac4c1b519feaf1ef63514f07fa16aa5dc7d89a (diff) | |
Remove references to INSERT_SUBREG after de-SSA.
Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of
INSERT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107878 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index b8734faa03..39558528c6 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1528,12 +1528,7 @@ void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB, if (Inst->isCopy() || Inst->isExtractSubreg()) { DstReg = Inst->getOperand(0).getReg(); SrcReg = Inst->getOperand(1).getReg(); - } else if (Inst->isInsertSubreg()) { - DstReg = Inst->getOperand(0).getReg(); - SrcReg = Inst->getOperand(2).getReg(); - if (Inst->getOperand(1).isUndef()) - isInsUndef = true; - } else if (Inst->isInsertSubreg() || Inst->isSubregToReg()) { + } else if (Inst->isSubregToReg()) { DstReg = Inst->getOperand(0).getReg(); SrcReg = Inst->getOperand(2).getReg(); } else if (!tii_->isMoveInstr(*Inst, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) |