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authorEvan Cheng <evan.cheng@apple.com>2007-08-13 23:45:17 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-08-13 23:45:17 +0000
commit549f27d3070195d6647b796841a5291b4549e8e0 (patch)
tree744759c3ecbea7c872a8b6728ca56b2228fa8109 /lib/CodeGen/SimpleRegisterCoalescing.cpp
parent12914380ed1fb5e7601e3eb1be1791148f0014de (diff)
Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41060 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
-rw-r--r--lib/CodeGen/SimpleRegisterCoalescing.cpp6
1 files changed, 0 insertions, 6 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index e71b9d4c0f..fef2fde32a 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -1123,12 +1123,6 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
continue;
LiveInterval &RegInt = li_->getInterval(reg);
float w = (mop.isUse()+mop.isDef()) * powf(10.0F, (float)loopDepth);
- // If the definition instruction is re-materializable, its spill
- // weight is half of what it would have been normally unless it's
- // a load from fixed stack slot.
- int Dummy;
- if (RegInt.remat && !tii_->isLoadFromStackSlot(RegInt.remat, Dummy))
- w /= 2;
RegInt.weight += w;
UniqueUses.insert(reg);
}