Don't copy regs that are only used in the entry block into a vreg. This

changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23109 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 9 insertions, 3 deletions

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 7b8d7c549c..c841d433c9 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1077,9 +1077,15 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
            AI != E; ++AI,++a)
         if (!AI->use_empty()) {
           SDL.setValue(AI, Args[a]);
-          SDOperand Copy =
-            CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
-          UnorderedChains.push_back(Copy);
+          
+          if (IsOnlyUsedInOneBasicBlock(AI) == F.begin()) {
+            // Only used in the entry block, no need to copy it to a vreg for
+            // other blocks.
+          } else {
+            SDOperand Copy =
+              CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
+            UnorderedChains.push_back(Copy);
+          }
         }
     } else {
       // Otherwise, if any argument is only accessed in a single basic block,