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| author | Chris Lattner <sabre@nondot.org> | 2011-02-13 19:09:16 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2011-02-13 19:09:16 +0000 |
| commit | e075118489baf15a7cea2e7f155b4799b93d6d02 (patch) | |
| tree | 9cf6795a2e0d8eddc3739d05383dcd29de983679 /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | e5116f840eedbc3cffa31adc683b4e37d53f2c7a (diff) | |
Revisit my fix for PR9028: the issue is that DAGCombine was
generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125465 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
0 files changed, 0 insertions, 0 deletions