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| author | Eli Friedman <eli.friedman@gmail.com> | 2010-08-02 04:42:25 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2010-08-02 04:42:25 +0000 |
| commit | 1d17d199a4cd6190fdf82e35c42b617eaae2cd35 (patch) | |
| tree | 0b359bd82175f30d95c5329eaf4efcd046bf8d99 /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | e28015c02cc112a9895b4ae22a88f15fefb23805 (diff) | |
PR7586: Make sure we don't claim that unknown bits are actually known in the
ISD::AND case of TargetLowering::SimplifyDemandedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110019 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 908a9d8919..9772d55449 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1497,11 +1497,10 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, // present in the input. APInt NewBits = APInt::getHighBitsSet(BitWidth, - BitWidth - EVT.getScalarType().getSizeInBits()) & - NewMask; + BitWidth - EVT.getScalarType().getSizeInBits()); // If none of the extended bits are demanded, eliminate the sextinreg. - if (NewBits == 0) + if ((NewBits & NewMask) == 0) return TLO.CombineTo(Op, Op.getOperand(0)); APInt InSignBit = APInt::getSignBit(EVT.getScalarType().getSizeInBits()); |