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author | Eli Friedman <eli.friedman@gmail.com> | 2011-11-09 22:25:12 +0000 |
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committer | Eli Friedman <eli.friedman@gmail.com> | 2011-11-09 22:25:12 +0000 |
commit | 0948f0acca745eef8db6922edfd8836f717396b4 (patch) | |
tree | 5650fb2d39d1efec5a2397026bbfb51078ce7e5e /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
parent | 7346347674f03868e8c076c8c27a7f09f0a086c2 (diff) |
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 3596d6cdf6..d7bad4385e 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1783,7 +1783,8 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, case ISD::BITCAST: // If this is an FP->Int bitcast and if the sign bit is the only // thing demanded, turn this into a FGETSIGN. - if (!Op.getOperand(0).getValueType().isVector() && + if (!Op.getValueType().isVector() && + !Op.getOperand(0).getValueType().isVector() && NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) && Op.getOperand(0).getValueType().isFloatingPoint()) { bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType()); |