diff options
author | Chris Lattner <sabre@nondot.org> | 2005-08-17 06:06:25 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-08-17 06:06:25 +0000 |
commit | fae59b99b8d1942f30a4be609423282c3fd62dd8 (patch) | |
tree | f192da79fcb530077e4402b88340d23c407bd913 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
parent | 6c26da6c0422e35717be92a7e0f9406488b3f084 (diff) |
Fix a regression on X86, where FP values can be promoted too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22822 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 44553afa3c..7303ee2add 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -991,7 +991,10 @@ CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) { return DAG.getCopyToReg(SDL.getRoot(), Reg, Op); } else if (SrcVT < DestVT) { // The src value is promoted to the register. - Op = DAG.getNode(ISD::ZERO_EXTEND, DestVT, Op); + if (MVT::isFloatingPoint(SrcVT)) + Op = DAG.getNode(ISD::FP_EXTEND, DestVT, Op); + else + Op = DAG.getNode(ISD::ZERO_EXTEND, DestVT, Op); return DAG.getCopyToReg(SDL.getRoot(), Reg, Op); } else { // The src value is expanded into multiple registers. |