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authorDan Gohman <gohman@apple.com>2009-08-01 03:51:09 +0000
committerDan Gohman <gohman@apple.com>2009-08-01 03:51:09 +0000
commitf7d6cd46e920776bb33913b2498347cf99358dc4 (patch)
treef6bb51971726d3dd61ee1095918139df3aabf93f /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parent7571eb5015ad07d4b849cd97a5f820be19523a66 (diff)
Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77769 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 5857db1081..bd26478d59 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -314,8 +314,8 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
- if (MF->getFunction()->hasGC())
- GFI = &getAnalysis<GCModuleInfo>().getFunctionInfo(*MF->getFunction());
+ if (Fn.hasGC())
+ GFI = &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn);
else
GFI = 0;
RegInfo = &MF->getRegInfo();
@@ -550,10 +550,10 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
// Only install this information if it tells us something.
if (NumSignBits != 1 || KnownZero != 0 || KnownOne != 0) {
DestReg -= TargetRegisterInfo::FirstVirtualRegister;
- FunctionLoweringInfo &FLI = CurDAG->getFunctionLoweringInfo();
- if (DestReg >= FLI.LiveOutRegInfo.size())
- FLI.LiveOutRegInfo.resize(DestReg+1);
- FunctionLoweringInfo::LiveOutInfo &LOI = FLI.LiveOutRegInfo[DestReg];
+ if (DestReg >= FuncInfo->LiveOutRegInfo.size())
+ FuncInfo->LiveOutRegInfo.resize(DestReg+1);
+ FunctionLoweringInfo::LiveOutInfo &LOI =
+ FuncInfo->LiveOutRegInfo[DestReg];
LOI.NumSignBits = NumSignBits;
LOI.KnownOne = KnownOne;
LOI.KnownZero = KnownZero;
@@ -569,7 +569,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
if (ViewDAGCombine1 || ViewLegalizeTypesDAGs || ViewLegalizeDAGs ||
ViewDAGCombine2 || ViewDAGCombineLT || ViewISelDAGs || ViewSchedDAGs ||
ViewSUnitDAGs)
- BlockName = CurDAG->getMachineFunction().getFunction()->getNameStr() + ":" +
+ BlockName = MF->getFunction()->getNameStr() + ":" +
BB->getBasicBlock()->getNameStr();
DOUT << "Initial selection DAG:\n";
@@ -1224,7 +1224,7 @@ SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops) {
}
// Add this to the output node.
- MVT IntPtrTy = CurDAG->getTargetLoweringInfo().getPointerTy();
+ MVT IntPtrTy = TLI.getPointerTy();
Ops.push_back(CurDAG->getTargetConstant(4/*MEM*/ | (SelOps.size()<< 3),
IntPtrTy));
Ops.insert(Ops.end(), SelOps.begin(), SelOps.end());