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| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-15 19:27:55 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-15 19:27:55 +0000 |
| commit | cc6165695fa1713230184d743368b8b3642faa5d (patch) | |
| tree | 51c2d38fe6efb00576d04673458ac01d90c09ba5 /lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
| parent | ed4c8c633c52a40ad1a3e8687f290be4aeb1f0e8 (diff) | |
[AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.
Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148225 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
0 files changed, 0 insertions, 0 deletions