diff options
| author | Dale Johannesen <dalej@apple.com> | 2009-06-01 23:27:20 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2009-06-01 23:27:20 +0000 |
| commit | 4150d83abe90a5da4ddf86433b7bf4329acfa57c (patch) | |
| tree | f6d49f1a1eadb573ca9969173c76b891c035eb53 /lib/CodeGen/SelectionDAG/LegalizeTypes.h | |
| parent | 83138998513faed0c1d31e712ac6e6d5e6ee8d91 (diff) | |
Make the implicit inputs and outputs of target-independent
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeTypes.h')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/lib/CodeGen/SelectionDAG/LegalizeTypes.h index 75c89246a3..9488b49a01 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -242,6 +242,8 @@ private: // Integer Result Promotion. void PromoteIntegerResult(SDNode *N, unsigned ResNo); + SDValue PromoteIntRes_ADDSUBC(SDNode *N, unsigned ResNo); + SDValue PromoteIntRes_ADDSUBE(SDNode *N, unsigned ResNo); SDValue PromoteIntRes_AssertSext(SDNode *N); SDValue PromoteIntRes_AssertZext(SDNode *N); SDValue PromoteIntRes_Atomic1(AtomicSDNode *N); @@ -278,6 +280,7 @@ private: // Integer Operand Promotion. bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo); + SDValue PromoteIntOp_ADDSUBE(SDNode *N, unsigned OpNo); SDValue PromoteIntOp_ANY_EXTEND(SDNode *N); SDValue PromoteIntOp_BIT_CONVERT(SDNode *N); SDValue PromoteIntOp_BUILD_PAIR(SDNode *N); |