diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-11 03:31:05 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-11 03:31:05 +0000 |
commit | e797e0c8644a649d162fb339b148f5db10447d4e (patch) | |
tree | ee4cfe6de9b2ffcd7fb72a44f33f2a608855ba08 /lib/CodeGen/SelectionDAG/FastISel.cpp | |
parent | 5127f7991373d1c69e4d3241ec11913f4f44bb21 (diff) |
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/FastISel.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 42 |
1 files changed, 12 insertions, 30 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index 5be457c620..63413d77cf 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1077,11 +1077,8 @@ unsigned FastISel::FastEmitInst_r(unsigned MachineInstOpcode, else { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) .addReg(Op0, Op0IsKill * RegState::Kill); - bool InsertedCopy = TII.copyRegToReg(*FuncInfo.MBB, FuncInfo.InsertPt, - ResultReg, II.ImplicitDefs[0], - RC, RC, DL); - if (!InsertedCopy) - ResultReg = 0; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); } return ResultReg; @@ -1102,11 +1099,8 @@ unsigned FastISel::FastEmitInst_rr(unsigned MachineInstOpcode, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) .addReg(Op0, Op0IsKill * RegState::Kill) .addReg(Op1, Op1IsKill * RegState::Kill); - bool InsertedCopy = TII.copyRegToReg(*FuncInfo.MBB, FuncInfo.InsertPt, - ResultReg, II.ImplicitDefs[0], - RC, RC, DL); - if (!InsertedCopy) - ResultReg = 0; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); } return ResultReg; } @@ -1126,11 +1120,8 @@ unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) .addReg(Op0, Op0IsKill * RegState::Kill) .addImm(Imm); - bool InsertedCopy = TII.copyRegToReg(*FuncInfo.MBB, FuncInfo.InsertPt, - ResultReg, II.ImplicitDefs[0], - RC, RC, DL); - if (!InsertedCopy) - ResultReg = 0; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); } return ResultReg; } @@ -1150,11 +1141,8 @@ unsigned FastISel::FastEmitInst_rf(unsigned MachineInstOpcode, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) .addReg(Op0, Op0IsKill * RegState::Kill) .addFPImm(FPImm); - bool InsertedCopy = TII.copyRegToReg(*FuncInfo.MBB, FuncInfo.InsertPt, - ResultReg, II.ImplicitDefs[0], - RC, RC, DL); - if (!InsertedCopy) - ResultReg = 0; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); } return ResultReg; } @@ -1177,11 +1165,8 @@ unsigned FastISel::FastEmitInst_rri(unsigned MachineInstOpcode, .addReg(Op0, Op0IsKill * RegState::Kill) .addReg(Op1, Op1IsKill * RegState::Kill) .addImm(Imm); - bool InsertedCopy = TII.copyRegToReg(*FuncInfo.MBB, FuncInfo.InsertPt, - ResultReg, II.ImplicitDefs[0], - RC, RC, DL); - if (!InsertedCopy) - ResultReg = 0; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); } return ResultReg; } @@ -1196,11 +1181,8 @@ unsigned FastISel::FastEmitInst_i(unsigned MachineInstOpcode, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg).addImm(Imm); else { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II).addImm(Imm); - bool InsertedCopy = TII.copyRegToReg(*FuncInfo.MBB, FuncInfo.InsertPt, - ResultReg, II.ImplicitDefs[0], - RC, RC, DL); - if (!InsertedCopy) - ResultReg = 0; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); } return ResultReg; } |