diff options
| author | Chris Lattner <sabre@nondot.org> | 2006-04-21 15:32:26 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-04-21 15:32:26 +0000 |
| commit | ef027f940cca409d9e923be3e30afa3f4f0af41a (patch) | |
| tree | 93b4e84866d6c2ca47d02606436fadca80396010 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 444b2cf4c3718da8d2b38344ca3d8e50aa9d9538 (diff) | |
Fix a couple more memory issues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27930 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 7019f8f646..e9b30cb38b 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -739,7 +739,7 @@ SDOperand DAGCombiner::visitADD(SDNode *N) { return N1.getOperand(0); if (!MVT::isVector(VT) && SimplifyDemandedBits(SDOperand(N, 0))) - return SDOperand(); + return SDOperand(N, 0); // fold (a+b) -> (a|b) iff a and b share no bits. if (MVT::isInteger(VT) && !MVT::isVector(VT)) { @@ -1144,7 +1144,7 @@ SDOperand DAGCombiner::visitAND(SDNode *N) { // fold (and (sra)) -> (and (srl)) when possible. if (!MVT::isVector(VT) && SimplifyDemandedBits(SDOperand(N, 0))) - return SDOperand(); + return SDOperand(N, 0); // fold (zext_inreg (extload x)) -> (zextload x) if (N0.getOpcode() == ISD::EXTLOAD) { MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT(); @@ -1452,7 +1452,7 @@ SDOperand DAGCombiner::visitXOR(SDNode *N) { // Simplify the expression using non-local knowledge. if (!MVT::isVector(VT) && SimplifyDemandedBits(SDOperand(N, 0))) - return SDOperand(); + return SDOperand(N, 0); return SDOperand(); } @@ -1481,7 +1481,7 @@ SDOperand DAGCombiner::visitSHL(SDNode *N) { if (TLI.MaskedValueIsZero(SDOperand(N, 0), MVT::getIntVTBitMask(VT))) return DAG.getConstant(0, VT); if (SimplifyDemandedBits(SDOperand(N, 0))) - return SDOperand(); + return SDOperand(N, 0); // fold (shl (shl x, c1), c2) -> 0 or (shl x, c1+c2) if (N1C && N0.getOpcode() == ISD::SHL && N0.getOperand(1).getOpcode() == ISD::Constant) { |