diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-10-10 16:52:03 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-10-10 16:52:03 +0000 |
| commit | d739075cbb88463dd83d212426cfe13ad17e00da (patch) | |
| tree | 036b2f5bc717d6362402400034c5fd1a652321c9 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | bba9aa3475e307be7bd60eecc733cd46eeaf107a (diff) | |
Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f15ce5784c..1e5499aaab 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -216,7 +216,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, } return false; case ISD::ADD: - // (add X, Y) & C == 0 iff (X&C)&(Y&C) == 0 and all bits are low bits. + // (add X, Y) & C == 0 iff (X&C)|(Y&C) == 0 and all bits are low bits. if ((Mask&(Mask+1)) == 0) { // All low bits if (MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && MaskedValueIsZero(Op.getOperand(1), Mask, TLI)) |