diff options
author | Nadav Rotem <nadav.rotem@intel.com> | 2011-06-15 11:19:12 +0000 |
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committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-06-15 11:19:12 +0000 |
commit | baff46f192fd028af8950f2e3824ea7c71fbd76e (patch) | |
tree | 1fa71dbb2d2d2f50845385ba09c9011fa4eb1e9d /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | 1e56a2a85fbafce5ceee72f72d41b84a71876844 (diff) |
Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).
Fix the a usage of getZeroExtendInReg which must also be done on scalar types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133052 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3cf7a2be6f..b6d926ebe6 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6428,14 +6428,15 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) { // FIXME: is there such a thing as a truncating indexed store? if (ST->isTruncatingStore() && ST->isUnindexed() && - Value.getValueType().isInteger() && !Value.getValueType().isVector()) { + Value.getValueType().isInteger()) { // See if we can simplify the input to this truncstore with knowledge that // only the low bits are being used. For example: // "truncstore (or (shl x, 8), y), i8" -> "truncstore y, i8" SDValue Shorter = GetDemandedBits(Value, - APInt::getLowBitsSet(Value.getValueSizeInBits(), - ST->getMemoryVT().getSizeInBits())); + APInt::getLowBitsSet( + Value.getValueType().getScalarType().getSizeInBits(), + ST->getMemoryVT().getScalarType().getSizeInBits())); AddToWorkList(Value.getNode()); if (Shorter.getNode()) return DAG.getTruncStore(Chain, N->getDebugLoc(), Shorter, |