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author | Chris Lattner <sabre@nondot.org> | 2006-03-25 22:19:00 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-03-25 22:19:00 +0000 |
commit | 6ea2dee6f675bd5eb32de08b4eecfe21ebe107a0 (patch) | |
tree | e4a02e9cf17fbd672cd8330311e4ba93dc5e6adf /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | 2430a5f0c7f7416bac6086e382eac73af75cf173 (diff) |
Don't call SimplifyDemandedBits on vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27128 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 8a0f488fde..157b0a26b4 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1120,7 +1120,8 @@ SDOperand DAGCombiner::visitAND(SDNode *N) { } // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1) // fold (and (sra)) -> (and (srl)) when possible. - if (SimplifyDemandedBits(SDOperand(N, 0))) + if (!MVT::isVector(VT) && + SimplifyDemandedBits(SDOperand(N, 0))) return SDOperand(); // fold (zext_inreg (extload x)) -> (zextload x) if (N0.getOpcode() == ISD::EXTLOAD) { |