diff options
| author | Dan Gohman <gohman@apple.com> | 2010-05-06 20:33:48 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-05-06 20:33:48 +0000 |
| commit | 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 (patch) | |
| tree | 7fe414b47ddf800a4b132ac4b3cfe9d3da7ab8e9 /lib/CodeGen/ScheduleDAGEmit.cpp | |
| parent | 746ad69e088176819981b4b2c5ac8dcd49f5e60e (diff) | |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGEmit.cpp')
| -rw-r--r-- | lib/CodeGen/ScheduleDAGEmit.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/CodeGen/ScheduleDAGEmit.cpp b/lib/CodeGen/ScheduleDAGEmit.cpp index 8e034203f4..ee08e1dc0e 100644 --- a/lib/CodeGen/ScheduleDAGEmit.cpp +++ b/lib/CodeGen/ScheduleDAGEmit.cpp @@ -51,7 +51,8 @@ void ScheduleDAG::EmitPhysRegCopy(SUnit *SU, } } bool Success = TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second, - SU->CopyDstRC, SU->CopySrcRC); + SU->CopyDstRC, SU->CopySrcRC, + DebugLoc()); (void)Success; assert(Success && "copyRegToReg failed!"); } else { @@ -62,7 +63,8 @@ void ScheduleDAG::EmitPhysRegCopy(SUnit *SU, isNew = isNew; // Silence compiler warning. assert(isNew && "Node emitted out of order - early"); bool Success = TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(), - SU->CopyDstRC, SU->CopySrcRC); + SU->CopyDstRC, SU->CopySrcRC, + DebugLoc()); (void)Success; assert(Success && "copyRegToReg failed!"); } |