diff options
| author | Jim Grosbach <grosbach@apple.com> | 2009-09-29 17:24:37 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-09-29 17:24:37 +0000 |
| commit | 9ab2238df9f921970554cae8e7f6f7ad23d6c626 (patch) | |
| tree | 17fec528febb3325648b1dcccc3eaf60f341a95b /lib/CodeGen/RegisterScavenging.cpp | |
| parent | 8971c4a30ed56a1f9c57842ae05c2050979976b7 (diff) | |
Moving register scavenging to a post pass results in virtual registers in
the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83077 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterScavenging.cpp')
| -rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index f878eaa55e..ada7b4665d 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -241,7 +241,8 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator MI, // Remove any candidates touched by instruction. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || MO.isUndef() || !MO.getReg()) + if (!MO.isReg() || MO.isUndef() || !MO.getReg() || + TRI->isVirtualRegister(MO.getReg())) continue; Candidates.reset(MO.getReg()); for (const unsigned *R = TRI->getAliasSet(MO.getReg()); *R; R++) @@ -279,7 +280,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, // Exclude all the registers being used by the instruction. for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { MachineOperand &MO = I->getOperand(i); - if (MO.isReg()) + if (MO.isReg() && !TRI->isVirtualRegister(MO.getReg())) Candidates.reset(MO.getReg()); } |