diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-30 00:57:25 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-30 00:57:25 +0000 |
| commit | 4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef (patch) | |
| tree | 44e100de3b58f991a1fb59c592e9f5efa487c43f /lib/CodeGen/RegisterScavenging.cpp | |
| parent | 2e1513d9cd7750db05048fb2af0c8cac0307fc5a (diff) | |
Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register
allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136548 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterScavenging.cpp')
| -rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 4fc711e1b8..9e9a145b0a 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -157,7 +157,7 @@ void RegScavenger::forward() { if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); - if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg)) + if (!Reg || isReserved(Reg)) continue; if (MO.isUse()) { @@ -184,7 +184,7 @@ void RegScavenger::forward() { if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); - if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg)) + if (!Reg || isReserved(Reg)) continue; if (MO.isUse()) { if (MO.isUndef()) |