diff options
| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-13 21:01:20 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-13 21:01:20 +0000 |
| commit | be766c72464116a445a02b542a450c4274bab5d0 (patch) | |
| tree | df819681fc4d2a770e0aecceca8d5473a7d66574 /lib/CodeGen/RegAllocLocal.cpp | |
| parent | 903b22cd51d82ba1c1c5ee5d37b7eb7911c755ee (diff) | |
Remove getAllocatedRegNum(). Use getReg() instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLocal.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocLocal.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index afbc7eb0e1..f9abd68e14 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -517,7 +517,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { if (MI->getOperand(i).isUse() && !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) { - unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum(); + unsigned VirtSrcReg = MI->getOperand(i).getReg(); unsigned PhysSrcReg = reloadVirtReg(MBB, MI, VirtSrcReg); MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register } @@ -551,7 +551,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) { - unsigned Reg = MI->getOperand(i).getAllocatedRegNum(); + unsigned Reg = MI->getOperand(i).getReg(); spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); @@ -584,7 +584,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) { - unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum(); + unsigned DestVirtReg = MI->getOperand(i).getReg(); unsigned DestPhysReg; // If DestVirtReg already has a value, use it. |