Introducing plugable register allocators and instruction schedulers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 7 insertions, 0 deletions

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 763221ffbf..69b944c709 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -18,6 +18,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
@@ -35,6 +36,12 @@ namespace {
   static Statistic<> NumLoads ("ra-local", "Number of loads added");
   static Statistic<> NumFolded("ra-local", "Number of loads/stores folded "
 			       "into instructions");
+
+  static RegisterRegAlloc
+    localRegAlloc("local", "  local register allocator",
+                  createLocalRegisterAllocator);
+
+
   class VISIBILITY_HIDDEN RA : public MachineFunctionPass {
     const TargetMachine *TM;
     MachineFunction *MF;