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authorChris Lattner <sabre@nondot.org>2005-11-21 07:06:27 +0000
committerChris Lattner <sabre@nondot.org>2005-11-21 07:06:27 +0000
commitac28fbd0436dd8b2bc0c071ba150b60bbfca67f3 (patch)
treed9edb72c6bf281582ac420fc2e9bfe5c3b72ca6b /lib/CodeGen/RegAllocLinearScan.cpp
parente2b1f1188fd8c28977b5cf2a6842fc7bbb008713 (diff)
Add section switching to common code generator code. Add a couple of
asserts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24445 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r--lib/CodeGen/RegAllocLinearScan.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index a42a366ef3..9bad0d376f 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -547,6 +547,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
minReg = reg;
}
}
+ assert(minReg && "Didn't find any reg!");
DEBUG(std::cerr << "\t\tregister with min weight: "
<< mri_->getName(minReg) << " (" << minWeight << ")\n");