diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-04-25 07:18:20 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-04-25 07:18:20 +0000 |
commit | 92efbfcd2d2309aedbab4a1269763c3de96219d4 (patch) | |
tree | cbde21ddf8b62d31735cadbeb551d8e2ade529b3 /lib/CodeGen/RegAllocLinearScan.cpp | |
parent | 1e341729dd003ca33ecea4abf13134f20062c5f8 (diff) |
Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36431 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 0ff989f674..f66400c535 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -776,8 +776,6 @@ unsigned RA::getFreePhysReg(LiveInterval *cur) { } } - const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg); - unsigned FreeReg = 0; unsigned FreeRegInactiveCount = 0; @@ -793,8 +791,8 @@ unsigned RA::getFreePhysReg(LiveInterval *cur) { << mri_->getName(cur->preference) << "\n"; // Scan for the first available register. - TargetRegisterClass::iterator I = rc->allocation_order_begin(*mf_); - TargetRegisterClass::iterator E = rc->allocation_order_end(*mf_); + TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_); + TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_); for (; I != E; ++I) if (prt_->isRegAvail(*I)) { FreeReg = *I; |